;	file: sta.def

;------->>> Revision History
;
;$Revision:   1.8  $
;    $Date:   20 Feb 1991 19:46:12  $
;     $Log:   D:\ST8A\STA_VCS\STA.DEV  $
;  
;     Rev 1.8   20 Feb 1991 19:46:12
;  add new variable for keyline operation
;  
;     Rev 1.7   14 Feb 1991  9:50:08
;  remove assembly control and version/date information and put
;  it in a new file: STA.VER
;  
;     Rev 1.6   13 Feb 1991 10:06:42
;  new version
;  
;     Rev 1.5   12 Feb 1991 22:54:20
;  new version
;  
;     Rev 1.4   12 Feb 1991 13:22:12
;  add literal for enter key flash during tests
;  new version
;  
;     Rev 1.3   11 Feb 1991 22:27:58
;  new version
;  
;     Rev 1.2   08 Feb 1991  8:55:22
;  rom version
;
;  
;     Rev 1.1   08 Feb 1991  8:26:34
;  new version
;  
;     Rev 1.0   06 Feb 1991  0:50:54
;  Initial revision.
;  
;  

;*****************************************************************************
;  rom and ram base addresses
;*****************************************************************************
;
;  when running the download version, the start address is offset from
;  the beginning of the rom
;
	%if	debug
rom_org		equ	1100h		; set the test start location
romlen		equ	8000h - 1100h	; length of the download code
	%else
rom_org		equ	0000h		; real version
romlen		equ	8000h		; set the length for 32k
	%endif

ram_org		equ	8000h		; 4K ram
eeprom_org	equ	9000h		; 2K eeprom


;*****************************************************************************
;  memory mapped registers.
;*****************************************************************************
;
;  the mark and space registers are 16 bits, mapped with the low byte
;  on the even address shown below, and the high byte one higher.
;
;  load these registers with  k = (frequency * 4)
;
tx_mark_mw	equ	0a000h		; transmit mark low byte (2 bytes)
tx_space_mw	equ	0a002h		; transmit space low byte (2 bytes)
rx_mark_mw	equ	0a004h		; receive mark low byte (2 bytes)
rx_space_mw	equ	0a006h		; receive space low byte (2 bytes)


;  ptt delay input switch - 16 bits
;
delay0_mr	equ	0e000h		; ptt delay switch, low byte
delay1_mr	equ	0f000h		; ptt delay switch, high byte

delay0_1ms_msk	equ	00fh		; 1's ms BCD digit
delay0_10ms_msk	equ	0f0h		; 10's ms BCD digit
delay1_100ms_msk equ	00fh		; 100's ms BCD digit
delay1_1000ms_msk equ	0f0h		; 1000's ms BCD digit



;*****************************************************************************
;  io mapped registers
;*****************************************************************************
;
;  8530 sio handles the remote control port and the regeneration port
;
;  remote wreg5:  PTT / 1 / 1   / 0 / TXENA / 0     / CTS / 0
;  remote rreg0:  BRK / x / RTS / x / DCD   / TXRDY / x   / RXRDY
;  remote rreg1:  x   / x / x   / x / x     / x     / x   / ALLSENT
;
remote_ctrl_io	equ	02h		; remote control port sio control
remote_data_io	equ	03h		; remote control port sio data
regen_ctrl_io	equ	00h		; regen port sio control
regen_data_io	equ	01h		; regen port sio data

regen_rxrdy_b	equ	01h		; regen receive data ready (rreg0)
regen_rxrdy_bit	equ	0		; 01h regen receive data ready
regen_txrdy_b	equ	04h		; regen transmit buffer ready (rreg 0)
regen_txrdy_bit	equ	2		; 04h regen transmit buffer ready
regen_rts_b	equ	20h		; data io port RTS input (rreg 0)
regen_rts_bit	equ	5		; 20h data io port RTS input (rreg 0)
regen_cts_b	equ	02h		; data io port CTS output (wreg 5)
regen_keyline_b	equ	80h		; keyline control 1 = ON
regen_txd_b	equ	08h		; data io port TXD input (rreg 0)
regen_txd_bit	equ	3		; 08h data io port TXD input (rreg 0)
regen_feoepe	equ	70h		; framing/overrun/parity error
regen_error_reset equ	30h		; error reset code (wreg 0)
regen_txd_reset	equ	10h		; reset txd status bit

remote_rxrdy_b	equ	01h		; remote port receive data ready (rreg 0)
remote_rxrdy_bit equ	0		; 01h remote port receive ready
remote_txrdy_b	equ	04h		; remote port transmit ready (rreg 0)
remote_txrdy_bit equ	2		; 04h remote port transmit buffer ready
remote_allsent_b equ	01h		; remote port all sent bit (rreg 1)
remote_rts_b	equ	02h		; remote port RTS output (wreg 5)
remote_dtr_b	equ	80h		; remote port DTR output (wreg 5)
remote_cts_b	equ	20h		; remote port CTS input (rreg 0)
remote_cts_bit	equ	5		; 20h remote port CTS input (rreg 0)
remote_feoepe	equ	70h		; framing/overrun/parity error
remote_error_reset equ	30h		; error reset code (wreg 0)

remote_dtroff_rtsoff equ 068h		; DTR off, RTS off, TXEN (wreg 5)
remote_dtroff_rtson equ	06ah		; DTR off, RTS on, TXEN (wreg 5)
remote_dtron_rtsoff equ	0e8h		; DTR on, RTS off, TXEN (wreg 5)
remote_dtron_rtson equ	0eah		; DTR on, RTS on, TXEN (wreg 5)

;  6.144 MHz rate constants for remote port
;  divisor  = [ 6,144,000 / (32 * baud rate) ] - 2 
;  divisor  = [ 192,000 / baud rate ] - 2
;
remote_br38400	equ	5-2		; 38,400 bps
remote_br19200	equ	10-2		; 19,200 bps
remote_br9600	equ	20-2
remote_br4800	equ	40-2
remote_br2400	equ	80-2
remote_br1200	equ	160-2
remote_br600	equ	320-2
remote_br300	equ	640-2
remote_br110	equ	1745-2
remote_br75	equ	2560-2
remote_br45	equ	4224-2


;  8279 scans the keypad and drives the display
;
fp_data_io	equ	10h		; front panel 8279 data address
fp_ctrl_io	equ	11h		; front panel 8279 control address

fp_mode		equ	08h		; 16 char display, encoded scan 2 key
fp_pclk		equ	28h		; set divisor to 8
fp_fifo_rd	equ	50h		; auto increment read
fp_mark_wr	equ	84h		; start of mark display
fp_space_wr	equ	89h		; start of space display
fp_baud_wr	equ	8dh		; start of baud rate display
fp_chan_wr	equ	8eh		; start of channel digit
fp_chled_wr	equ	8fh		; start of channel led's
fp_chled_ch1	equ	01h		; channel 1 = demod
fp_chled_ch2	equ	02h		; channel 2 = mod
fp_clear	equ	0dfh		; clear display and fifo, set blanking
fp_blank	equ	0a0h		; enable all writes
fp_ready	equ	80h		; display controller ready bit

; keypad scan codes are listed below
; these scan codes assume that the upper two bits of the 8279 keyboard
; scan data have been cleared.  The upper bits are unused shift bits
;
kbd_1		equ	02h		; keypad 1
kbd_2		equ	0ah		; keypad 2
kbd_3		equ	12h		; keypad 3
kbd_4		equ	1ah		; keypad 4
kbd_ms		equ	22h		; keypad ms
kbd_fsk		equ	2ah		; keypad fsk
kbd_div		equ	32h		; keypad div
kbd_amh		equ	3ah		; keypad amh
kbd_chan	equ	2bh		; keypad chan
kbd_5		equ	01h		; keypad 5
kbd_6		equ	09h		; keypad 6
kbd_7		equ	11h		; keypad 7
kbd_8		equ	19h		; keypad 8
kbd_bit		equ	21h		; keypad bit
kbd_mark	equ	29h		; keypad mark
kbd_mute	equ	31h		; keypad mute
kbd_norm	equ	39h		; keypad norm
kbd_baud	equ	33h		; keypad baud
kbd_enter	equ	00h		; keypad enter
kbd_9		equ	08h		; keypad 9
kbd_0		equ	10h		; keypad 0
kbd_dot5	equ	18h		; keypad dot5
kbd_2nd		equ	20h		; keypad 2nd
kbd_space	equ	28h		; keypad space
kbd_remote	equ	30h		; keypad remote
kbd_sync	equ	38h		; keypad sync
kbd_clear	equ	3bh		; keypad clear

; the scan codes are converted in to ASCII characters before the 
; input is processed.  The code for each key is listed below.
; changing these assignments will re-assign key values.
;
key_0		equ	00h		; keypad 0
key_1		equ	01h		; keypad 1
key_2		equ	02h		; keypad 2
key_3		equ	03h		; keypad 3
key_4		equ	04h		; keypad 4
key_5		equ	05h		; keypad 5
key_6		equ	06h		; keypad 6
key_7		equ	07h		; keypad 7
key_8		equ	08h		; keypad 8
key_9		equ	09h		; keypad 9
key_enter	equ	0ah		; keypad enter
key_dot5	equ	0bh		; keypad 0.5
key_ms		equ	0ch		; keypad ms
key_cent	equ	key_ms		;  keypad key_cent = 2nd key_ms
key_fsk		equ	0dh		; keypad fsk
key_div		equ	0eh		; keypad div
key_amh		equ	0fh		; keypad amh
key_hold	equ	key_amh		;  keypad key_hold = 2nd key_amh
key_chan	equ	10h		; keypad chan
key_bit		equ	11h		;  keypad key_bit = 2nd key_bit
key_mark	equ	12h		; keypad mark
key_mkonly	equ	key_mark	;  keypad key_mkonly = 2nd key_mark
key_mute	equ	13h		; keypad mute
key_norm	equ	14h		; keypad norm
key_rev		equ	key_norm	;  keypad key_rev = 2nd key_norm
key_baud	equ	15h		; keypad baud
key_2nd		equ	16h		; keypad 2nd
key_space	equ	17h		; keypad space
key_sponly	equ	key_space	;  keypad key_sponly = 2nd key_space
key_remote	equ	18h		; keypad remote
key_sync	equ	19h		; keypad sync
key_regen	equ	key_sync	;  keypad key_regen = 2nd key_sync
key_clear	equ	1ah		; keypad clear


;  8254 timer drives the synthesizers reference, the low pass filter,
;  and the real time clock
;
timer_ref_io	equ	18h		; synthesizer clock  819,200 hz
timer_lowpass_io equ	19h		; low pass filter clock
timer_nmi_io	equ	1ah		; 1 ms time base
timer_ctrl_io	equ	1bh		; timer control address

timer_ref_mode	equ	036h		; set timer0 for square wave
timer_lowpass_mode equ	076h		; set timer1 for square wave
timer_nmi_mode	equ	0b6h		; set timer2 for square wave
timer_nmi_mode2	equ	0b4h		; set timer2 for rate multiplier

timer_delay_bit	equ	500		; set test toggle to 500 ms


;  address latch
;  note that the address bit shown below is inverted since the switch will
;  ground one of the buffer inputs.
;
address_ior	equ	20h		; unit address switch

address_01_b	equ	80h		; ch1 base address for unit
address_03_b	equ	40h
address_05_b	equ	20h
address_07_b	equ	10h
address_09_b	equ	08h
address_11_b	equ	04h
address_13_b	equ	02h
address_15_b	equ	01h


;  remote port baud rate switch
;  note that the baud rate bit shown below is inverted since the switch will
;  ground one of the buffer inputs.
;
baud_ior	equ	28h		; remote port baud rate switch

baud_19200_b	equ	80h		; one bit sets the rate
baud_9600_b	equ	40h
baud_4800_b	equ	20h
baud_2400_b	equ	10h
baud_1200_b	equ	08h
baud_600_b	equ	04h
baud_300_b	equ	02h
baud_110_b	equ	01h


;  8 bit input buffers
;
;  input_ior - general input buffer
;
input_ior	equ	30h		; input register

input_rxd_b	equ	80h		; rx data 1 = mark, 0 = space
input_remtype_b	equ	40h		; remote port config 1 = mil, 0 = rs232
input_txdtype_b	equ	20h		; txd config 1 = mil, 0 = rs232
input_kbint_b	equ	10h		; keypad interrupt 0 = interrupt req
input_level_msk	equ	0eh		; input signal level
input_los_b	equ	01h		; los signal  1 = los, 0 = signal


;  8 bit output latches and registers
;
;  out0_iow - control latch
;
out0_iow	equ	38h		; control output bits

ctrl_markql_b	equ	080h + (out0_iow shl 8) ; mark Q wide enable  1 = wide, 0 = set
ctrl_markq_msk	equ	0F0h		        ; mark q select bits
ctrl_spaceql_b	equ	008h + (out0_iow shl 8) ; space q wide enable 1 = wide, 0 = set
ctrl_spaceq_msk	equ	00Fh		        ; space q select bits


;  out1_iow - control latch
;
out1_iow	equ	39h		; control output bits

ctrl_nmiena_b	equ	80h + (out1_iow shl 8) ; nmi enable  1 = nmi on, 0 = nmi off
ctrl_regen_b	equ	40h + (out1_iow shl 8) ; regen enable  1 = on, 0 = off
ctrl_rsync_b	equ	20h + (out1_iow shl 8) ; resync enable  1 = ON, 0 = off
ctrl_rxdrev_b	equ	10h + (out1_iow shl 8) ; rxd reverse  1 = reverse, 0 = normal
ctrl_txdrev_b	equ	08h + (out1_iow shl 8) ; txd reverse  1 = reverse, 0 = normal
ctrl_txdrev	equ	08h		       ; txd bit
ctrl_txdena_b	equ	04h + (out1_iow shl 8) ; txd input enable  1 = on, 0 = off
ctrl_rtsout_b	equ	02h + (out1_iow shl 8) ; rtsout 1 = OFF, 0 = ON
ctrl_divena_b	equ	01h + (out1_iow shl 8) ; diversity enable  1 = div on


;  out2_iow - control latch
;
out2_iow	equ	3ah		; control output bits

ctrl_amhena_b	equ	80h + (out2_iow shl 8) ; amh enable  1 = on, 0 = off
ctrl_hsena_b	equ	40h + (out2_iow shl 8) ; hs demod enable  1 = on, 0 = off
ctrl_detm_msk	equ	30h		       ; detector mode mask
ctrl_detm_mkonly_b equ	02h + (out2_iow shl 8) ; detector mode - mark only
ctrl_detm_sponly_b equ	01h + (out2_iow shl 8) ; detector mode - space only
ctrl_detm_ms_b	equ	03h + (out2_iow shl 8) ; detector mode - mark/space atc
ctrl_chsel_b	equ	08h + (out2_iow shl 8) ; channel select  1 = ch2, 0 = ch1
ctrl_mute_b	equ	04h + (out2_iow shl 8) ; tone mute  1 = mute, 0 = on
ctrl_loopbk_msk	equ	03h		       ; loopback mask
ctrl_loopbk_off_b equ	00h + (out2_iow shl 8) ; loopback off
ctrl_loopbk_0_b	equ	01h + (out2_iow shl 8) ; loopback 0 dBm
ctrl_loopbk_1_b	equ	02h + (out2_iow shl 8) ; loopback -10 dBm
ctrl_loopbk_2_b	equ	03h + (out2_iow shl 8) ; loopback -45 dBm

;  sanity timer - will restart the box if not tickled periodically
;
sanity_iow	equ	3bh		; sanity timer


;  led output latches
;
led0_iow	equ	3ch		; led latch 0
led1_iow	equ	3dh		; led latch 1
led_mark_b	equ	80h + (led0_iow shl 8) ; 0 = led ON, 1 = led OFF
led_center_b	equ	40h + (led0_iow shl 8) ; display center freq
led_space_b	equ	20h + (led0_iow shl 8) ; display space freq
led_shift_b	equ	10h + (led0_iow shl 8) ; display shift freq
led_sync_b	equ	08h + (led0_iow shl 8) ; resync ON
led_regen_b	equ	04h + (led0_iow shl 8) ; regen ON
led_mkonly_b	equ	02h + (led0_iow shl 8) ; mark only detection
led_sponly_b	equ	01h + (led0_iow shl 8) ; space only detection
led0_all	equ	0ffh + (led0_iow shl 8) ; make for all bits
led_mark_space_b   equ	led_mark_b or led_space_b   ; mark and space
led_center_shift_b equ	led_center_b or led_shift_b ; center and shift

led_fsk_b	equ	80h + (led1_iow shl 8) ; fsk ON
led_amh_b	equ	40h + (led1_iow shl 8) ; auto mark hold ON
led_hold_b	equ	20h + (led1_iow shl 8) ; hold ON
led_reverse_b	equ	10h + (led1_iow shl 8) ; channel reverse ON
led_enter_b	equ	08h + (led1_iow shl 8) ; enter indicator
led_diversity_b	equ	04h + (led1_iow shl 8) ; diversity ON
led_mute_b	equ	02h + (led1_iow shl 8) ; mute ON
led_remote_b	equ	01h + (led1_iow shl 8) ; remote ON
led1_all	equ	0ffh + (led1_iow shl 8) ; make for all bits

enter_count_max	equ	1200			; enter led toggle constant


;  high speed local oscillator synthesizer
;
;  load these registers with k = (center freq + 10,000) / 12.5
;
hslo0_iow	equ	3eh		; low byte
hslo1_iow	equ	3fh		; high byte


;*****************************************************************************
;  literals
;*****************************************************************************
;
; some misc literal definitions
;
power_on	equ	9876h		; power ON init flag
sanity_test_on	equ	0a55ah		; sanity set flag

;
;  some bit flag definitions
;
bit7		equ	7
bit6		equ	6
bit5		equ	5
bit4		equ	4
bit3		equ	3
bit2		equ	2
bit1		equ	1
bit0		equ	0

;  ascii characters
;
bell		equ	07h
bs		equ	08h
cr		equ	0dh
lf		equ	0ah
del		equ	7fh


;*****************************************************************************
; RESTART function definitions
;*****************************************************************************
;
; hardware related latch values and settings
;
; RST	1	"SET_RST"
;
set_tx_mark		equ	00h	; hl = tx mark constant  (mark * 8)
set_tx_space		equ	01h	; hl = tx space constant (space * 8)
set_rx_mark		equ	02h	; hl = rx mark constant  (mark * 4)
set_rx_space		equ	03h	; hl = rx space constant (space * 4)
set_rx_lowpass		equ	04h	; hl = timer constant  4,915,200 / (96 * baud)
set_rx_hispeed		equ	05h	; hl = local oscillator constant
set_q_mark		equ	06h	; l = mark Q (4 bits)
set_q_space		equ	07h	; l = space Q (4 bits)
set_detmode		equ	08h	; l = detector mode (2 bits)
set_loopback		equ	09h	; l = loopback mode (2 bits)
set_control_set		equ	0ah	; h = port, l = bit
set_control_clear	equ	0bh	; h = port, l = bit
set_led_on		equ	0ch	; h = led latch, l = bit
set_led_off		equ	0dh	; h = led latch, l = bit
set_regen_config	equ	0eh	; hl = pointer to configuration table
set_regen_baud		equ	0fh	; hl = baud rate
set_regen_length	equ	10h	; l = async char length
set_remote_config	equ	11h	; hl = pointer to configuration table
set_remote_baud		equ	12h	; hl = remote data rate
set_remote_rts		equ	13h	; l = rts (on) or 00 (off) in write reg 5
set_txc			equ	14h	; hl = sync transmit clock
set_nmi_clock		equ	15h	; hl = nmi clock counter
set_sanity_flag		equ	16h	; set sanity test flag for production test


; show front panel displays
;
; RST	2	"SHOW_RST"
;
show_freq		equ	00h	; show either mark/space or center/shift
show_mark		equ	01h	; read mark from memory
show_space		equ	02h	; read space from memory
show_mark_space		equ	03h	; read mark and space from memory
show_center		equ	04h	; read center from memory
show_shift		equ	05h	; read shift from memory
show_center_shift	equ	06h	; read center and shift from memory
show_baud		equ	07h	; read baud rate from memory
show_channel		equ	08h	; read current channel from memory
show_led_status		equ	09h	; show current led status for channel
show_led_on		equ	0ah	; h = led latch, l = bit
show_led_off		equ	0bh	; h = led latch, l = bit
show_mark_ascii		equ	0ch	; hl = pointer to ascii string (0 terminator)
show_space_ascii	equ	0dh	; hl = pointer to ascii string
show_baud_ascii		equ	0eh	; hl = pointer to ascii string
show_channel_char	equ	0fh	; l = ascii char for channel digit (1 char)
show_mark_string	equ	10h	; hl = pointer to string (5 char max)
show_space_string	equ	11h	; hl = pointer to string
show_baud_string	equ	12h	; hl = pointer to string
show_channel_byte	equ	13h	; l = 7 segment image (1 char)

; some read functions
;
; RST	3	"READ_RST"
;
read_ptt_delay		equ	00h	; return hl set to ptt delay
read_address		equ	01h	; return address switch in l
read_remote_baud	equ	02h	; return baud switch in l
read_remote_status	equ	03h	; return remote port status in l (read reg 0)
read_remote_data	equ	04h	; return remote char in l
read_remote_buffer	equ	05h	; return next remote char from buffer in l
read_regen_status	equ	06h	; return regen port status in l (read reg 0)
read_regen_data		equ	07h	; return remote char in l
read_regen_buffer	equ	08h	; return remote char in l
read_keypad		equ	09h	; return keypress in l
read_keypad_buffer	equ	0ah	; return next keypress from buffer in l
read_timeout		equ	0bh	; return timeout count in hl
read_remote_select	equ	0ch	; return l = 1 if active, h = channel
read_tx_mark		equ	0dh	; return hl = tx mark freq * 2
read_tx_space		equ	0eh	; return hl = tx space freq * 2
read_tx_baud		equ	0fh	; return hl = tx baud rate
read_rx_mark		equ	10h	; return hl = rx mark freq * 2
read_rx_space		equ	11h	; return hl = rx space freq * 2
read_rx_baud		equ	12h	; return hl = rx baud rate
read_remote_error	equ	13h	; l = error, return hl = message

remote_syntax_error	equ	00h	; command syntax error
remote_mismatch_error	equ	01h	; command not for channel
remote_unknown_error	equ	02h	; unknown command error
remote_not_enabled_error equ	04h	; remote port not selected
remote_baud_2low_error	equ	05h	; baud rate is too low
remote_baud_2high_error	equ	06h	; baud rate is too high
remote_freq_2low_error	equ	07h	; frequency is too low
remote_freq_2high_error	equ	08h	; frequency is too high
remote_2long_error	equ	09h	; command line too long
remote_shift_2low_error	equ	10h	; shift is too low
remote_shift_2high_error equ	11h	; shift is too high


; buffered and immediate remote port output functions
;
; RST	4	"SEND_RST"  "STORE_RST"
;
send_remote		equ	00h	; send next buffered char to the remote port
send_remote_char	equ	01h	; l is the character to send immediately
send_remote_ascii	equ	02h	; hl points to the string immediately
store_remote_char	equ	03h	; l is the next char to store in buffer
store_remote_ascii	equ	04h	; hl points to the string to store in buffer
store_remote_number	equ	05h	; hl is number * 2.  store 1234 or 1234.5
store_remote_numberz	equ	06h	; hl is number * 2. show zeros
store_remote_hex	equ	07h	; hl is 4 digit hex number
send_regen		equ	08h	; send next buffered char to the regen port
send_regen_char		equ	09h	; l is the character to send


; some calculate and setup functions
; these routines do all that is needed to configure the operation
;
; RST	5	"SETUP_RST"
;
setup_tx_mark		equ	00h	; hl = tx mark freq * 2
setup_tx_space		equ	01h	; hl = tx space freq * 2
setup_tx_center		equ	02h	; hl = tx center freq * 2
setup_tx_shift		equ	03h	; hl = tx shift freq * 2
setup_tx_baud		equ	04h	; hl = tx baud rate * 2
setup_tx_half_hz	equ	05h	; l = 1 to enable
setup_tx_hold		equ	06h	; l = 1 to enable
setup_tx_mode		equ	07h	; l = modulator mode
setup_tx_mute		equ	08h	; l = 1 to enable
setup_tx_reverse	equ	09h	; l = 1 for reverse
setup_rx_mark		equ	0ah	; hl = rx mark freq * 2
setup_rx_space		equ	0bh	; hl = fx space freq * 2
setup_rx_center		equ	0ch	; hl = rx center freq * 2
setup_rx_shift		equ	0dh	; hl = rx shift freq * 2
setup_rx_baud		equ	0eh	; hl = rx baud rate * 2
setup_rx_half_hz	equ	0fh	; l = 1 to enable
setup_rx_amh		equ	10h	; l = 1 to enable
setup_rx_diversity	equ	11h	; l = 1 to enable
setup_rx_hold		equ	12h	; l = 1 to enable
setup_rx_mode		equ	13h	; l = demod mode
setup_rx_regen		equ	14h	; l = 1 to enable
setup_rx_reverse	equ	15h	; l = 1 for reverse
setup_rx_sync_async	equ	16h	; l = sync or word length
setup_remote_baud	equ	17h	; l = baud switch setting
setup_remote_echo	equ	18h	; l = 1 for echo
setup_remote_on		equ	19h	; l = 1 remote, 0 for local
setup_address		equ	1ah	; l = address switch
setup_channel		equ	1bh	; l = 1 or 2
setup_ptt_delay		equ	1ch	; hl = ptt delay switch setting
setup_timeout		equ	1dh	; hl = number of ms for nmi timeout
setup_data_cts		equ	1eh	; l = 0 for CTS OFF, l=1 CTS ON
setup_keyline		equ	1fh	; l = 0 for PTT/CTS OFF, l=1 PTT ON


; some misc functions
;
; RST	6	"MISC_RST"
;
save_config		equ	00h	; write the EEPROM from RAM
restore_config		equ	01h	; read the EEPROM, store in RAM

ascii_to_binary		equ	02h	; hl points to ascii string, return hl
bcd_to_binary		equ	03h	; hl contains BCD digits, return binary
display_to_binary	equ	04h	; convert display_buffer, return hl
binary_to_ascii		equ	05h	; hl = freq * 2, ix = destination
char_to_display		equ	06h	; l = ascii char, return l = display code
calc_q			equ	07h	; hl = filter frequency
divide_hl_bc		equ	08h	; divide hl by bc.  return hl
rom_checksum		equ	09h	; calculate the rom checksum, hl = sum
key_judge		equ	0ah	; look at key, hl = table start

init_timer		equ	10h	; init the 8254
init_timer1		equ	11h	; init the 8254 with nmi in mode2
init_fp			equ	12h	; init the 8279
init_remote		equ	13h	; init the remote control port
init_regen		equ	14h	; init the regen port
init_keypad_buffer	equ	15h	; init the keypad buffer pointers
init_remote_buffer	equ	16h	; init the remote port buffer pointers
init_regen_buffer	equ	17h	; init the regen buffer pointers
enable_remote_intr	equ	18h	; enable remote port interrupts
enable_regen_intr	equ	19h	; enable regen port interrupts


;*****************************************************************************
;  macros
;*****************************************************************************
;
;  some macro definitions
;
;  when debugging, we need to use calls rather than RST commands to call
;  the routines since the RST's are used for breakpoints.
;
	%if	debug
set_rst	%macro
	call	rst_set
	%endm

show_rst %macro
	call	rst_show
	%endm

read_rst %macro
	call	rst_read
	%endm

send_rst %macro
	call	rst_send
	%endm

store_rst %macro
	call	rst_store
	%endm

setup_rst %macro
	call	rst_setup
	%endm

misc_rst %macro
	call	rst_misc
	%endm

	%else

set_rst	%macro
	rst	1
	%endm

show_rst %macro
	rst	2
	%endm

read_rst %macro
	rst	3
	%endm

send_rst %macro
	rst	4
	%endm

store_rst %macro
	rst	4
	%endm

setup_rst %macro
	rst	5
	%endm

misc_rst %macro
	rst	6
	%endm

	%endif